ATM Segmentation / Reassembly


Segmentation

Configuration for simulation only.

Generate I.432 compliant idle cells

  • Yes: Idle cells have an ATM header of 0x0000_0001 and payload of 0x6A in compliance with I.432 standard.
  • No: Idle cells contain all zeroes.

Variable Bit Rate: Rate-controlled segmentation.

  • Maximum rate control I value: Maximum intercell interval selected from a list of choices and defined in cell slots:
    • 256
    • 1024
    • 4096
    • 16384

Unspecified Bit Rate: segmentation.

  • Enable UBR control
    • Yes: The attached I and L Rate Control parameters will be in use.
    • No: UBR cells will be sent during all non-scheduled cell slots.
  • Increment and Limit. Values according to ATM UNI 3.1 Generic Cell Rate Algorithm specifications, and defined in cell slots + hundredths (max 1023.99).


Reassembly

Configuration for monitoring and simulation.

Acquisition type: Structure of data used to record the monitored events.

  • ATM Cells
  • PDUs: With conveyed data processed from cells payload.
    •

    Cell/PDU payload analysis length: The event data is partially recorded and truncated beyond a maximum length which can be edited.

    Monitor cells with unrecognized header

  • Yes: Cells are monitored.
  • No: Cells are discarded.
    •

    Enable OAM processing

  • Yes
  • No

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